• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a test apparatus for a semiconductor device that can test whether a semiconductor device can be normally operated by noise generated in a mounting system. A test control unit for supplying a power supply voltage and a ground voltage, and then reading the device to determine the pass and fail states of the device, and to switch the devices mounted on the test control unit and the execution board. It is connected between, and includes a noise generator for generating noise for applying to the power supply voltage and ground voltage applied from the test control unit.
    公开号:KR19980058493A
    申请号:KR1019960077818
    申请日:1996-12-30
    公开日:1998-10-07
    发明作者:김현래；주석기；김희욱
    申请人:김영환；현대전자산업 주식회사；
    IPC主号:
    专利说明:

    Test device of semiconductor device
    BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a test device for a semiconductor device, and more particularly, to a test device for a semiconductor device capable of testing whether a semiconductor device can normally operate by noise generated in a mounting system.
    In general, a test system for semiconductor devices is adapted to screen devices on which a fail has occurred. Such a test system was tested and screened only for devices in which the power supply voltage (VCC) and ground voltage (VSS) were supplied at a stable level.
    A test apparatus for a conventional semiconductor device will be described with reference to FIG. 1.
    Referring to FIG. 1, a test apparatus for a conventional semiconductor device includes a performance board (P / B) 10 for mounting a device for testing, and a test for testing a device mounted on the execution board. The control unit 20 and the test control unit 20 and the first, second and third switches SW1, SW2, SW3 for switching the elements mounted on the execution board 10 are provided.
    The test controller 20 may include a power supply 21 for applying a power supply voltage VCC and a ground voltage VSS to a device, and a driver 22 for transmitting a write or read signal to the device. And a first and second comparators 23 and 24 for comparing whether a signal read from the device is high or low when the read signal is transmitted from the driver 22.
    When the user mounts the execution board 10 to test the semiconductor device and then turns on the first and second switches SW1 and SW2, the power supply 21 applies a power supply voltage and a ground voltage to the device. When the 3 switch SW3 is turned on, the write or read signal transmitted from the driver 22 is transmitted to the device. In this case, when the write signal is transmitted from the driver 22, the device writes the signal transmitted from the test control unit 20, and when the read signal is transmitted from the driver 22, the test control unit 20 reads the signal of the device. The first and second comparators 23 and 24 are then used to compare the high and low to determine and screen the pass and fail states of the device.
    However, the test apparatus of the conventional semiconductor device as described above cannot test the pass and fail of the semiconductor device against noise generated in the mounting system by performing the test only in a state where the power supply is stably supplied. Was present.
    Accordingly, the present invention is to solve such a problem, and the path of the semiconductor device against the noise generated in the mounting system by testing the semiconductor device by generating noise in the power supply power supply as well as at a stable level. And a test apparatus for a semiconductor device capable of testing a fail.
    1 is a circuit diagram of a test apparatus for a conventional semiconductor device.
    2 is a circuit diagram of a test apparatus for a semiconductor device according to an embodiment of the present invention.
    3 is a circuit diagram of a noise generator according to an exemplary embodiment of the present invention.
    * Explanation of symbols for the main parts of the drawings
    10: execution board, 20: test control unit, 21: power supply, 22: driver, 23: first comparator, 24: second comparator, 30: switching unit, 40: noise generating unit, 41: noise generating unit, 42: Charge and discharge control means, 43: switching means, 44: operational amplifier, 45: sinusoidal control means
    The test apparatus for a semiconductor device of the present invention for achieving the above object includes an execution board for mounting the device for testing; A test controller which supplies a power supply voltage and a ground voltage to test a device mounted on an execution board, reads the device, and determines and screens a pass and fail state; A switching unit for switching devices mounted on the test control unit and the execution board; It is connected between the switching unit and the device, characterized in that it comprises a noise generating unit for generating noise by using the power supply voltage and ground voltage applied from the test control unit to the input terminal through the output terminal to the device.
    EXAMPLE
    Hereinafter, preferred embodiments of the present invention will be described with reference to FIGS. 2 and 3.
    Referring to FIG. 2, a test apparatus for a semiconductor device according to an embodiment of the present invention includes a device in which a power supply voltage VCC and a ground voltage VSS are mounted on an execution board 10 through a switching unit 30 to test a device. ) And then the test control unit 20 and the switching unit 30 and the execution board 10 which read the data of the device through the switching unit 30 to determine and screen pass and fail states. It is connected between the device (Device) of the, and includes a noise generator 40 for generating noise for applying to the power supply voltage and ground voltage applied from the test control unit 20 to the device.
    The switching unit 30 includes a first switch SW1 for applying the power supply voltage of the power supply 21 to the device, a second switch SW2 for applying the ground voltage of the power supply 22 to the device, and a driver ( And a third switch SW3 for switching the light or read signal transmitted from 22.
    The noise generator of FIG. 1 will be described with reference to FIG. 3.
    Referring to FIG. 3, the noise generating unit 40 includes noise generating means 41 capable of selectively generating a magnitude of noise, and charge and discharge control means for controlling charging and discharging of the noise generating means 41 ( 42, switching means 43 for selecting charging and discharging of the noise generating means 41, and signals input from the test controller 20 through the input terminal and noise signals input from the noise generating means 41. An operational amplifier 44 for inverting and outputting noise to the output terminal and a sine wave control means 45 for controlling the waveform of the sine wave of the noise output to the output terminal are provided.
    The noise generating means 41 includes a plurality of capacitors C1 to Cn having different capacitances.
    The charge / discharge control means 42 includes a variable resistor RV capable of changing the resistance value in order to control charge / discharge of the plurality of capacitors C1 to Cn of the noise generating means 41.
    The switching means 43 is provided with a switch SW capable of arbitrarily selecting and switching a plurality of capacitors C1 to Cn of the noise generating means 41.
    The sinusoidal wave control means 45 is provided with the 1st and 2nd resistors R1 and R2 connected in series in order to change the sinusoidal wave which the noise output to an output terminal has.
    When the noise generated by the noise generator 40 is applied to the device of the execution board 10 and the driver 22 transmits a read signal, the first and second comparators 23 and 24 are read from the device. The signals are compared, respectively, and the test controller 20 then screens the signals compared by the first and second comparators 23 and 24 in the form of highs and lows.
    Therefore, based on the signals screened on the test controller 20, it may be determined whether the semiconductor device of the execution board 10 may be normally operated by noise generated in the mounting system.
    As described above, the test apparatus for the semiconductor device of the present invention tests the semiconductor device by generating noise, thereby testing the path and fail of the semiconductor device against noise generated in the mounting system, and also improving the quality of the product. That provides an excellent effect.
    权利要求:
    Claims (6)
    [1" claim-type="Currently amended] An execution board for mounting an element for testing; A test controller which supplies a power supply voltage and a ground voltage to test the device mounted on the execution board, and then reads the device to determine a pass and fail state and to screen the device; A switching unit which switches the device mounted on the test control unit and the execution board; And a noise generator connected between the switching unit and the device to generate noise using a power supply voltage and a ground voltage applied to the test controller rotor input terminal, and output noise to the device through an output terminal. Test device for semiconductor devices.
    [2" claim-type="Currently amended] The noise generating unit of claim 1, wherein the noise generating unit comprises: noise generating means capable of selectively generating a magnitude of noise, charging and discharging control means for controlling charging and discharging of the noise generating means, charging and Switching means for selecting a discharge, an operational amplifier for outputting noise to an output terminal by inverting a signal input from the test controller through the input terminal and a noise signal input from the noise generating means, and noise output to the output terminal A sine wave control means for controlling the waveform of a sine wave is provided, The test apparatus of the semiconductor element characterized by the above-mentioned.
    [3" claim-type="Currently amended] 3. The test apparatus of claim 2, wherein the noise generating means comprises a plurality of capacitors having different capacitances.
    [4" claim-type="Currently amended] 3. The test apparatus of claim 2, wherein the charge and discharge control means includes a variable resistor capable of changing a resistance value to control charge and discharge of the plurality of capacitors of the noise generating means.
    [5" claim-type="Currently amended] The test apparatus according to claim 2, wherein the switching means comprises a switch capable of arbitrarily selecting and switching a plurality of capacitors of the noise generating means.
    [6" claim-type="Currently amended] 3. The test apparatus of claim 2, wherein the sinusoidal control means includes first and second resistors connected in series to change a sinusoidal wave of noise output to an output terminal.
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    同族专利:
    公开号 | 公开日
    KR100401531B1|2004-01-28|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    1996-12-30|Application filed by 김영환, 현대전자산업 주식회사
    1996-12-30|Priority to KR1019960077818A
    1998-10-07|Publication of KR19980058493A
    2004-01-28|Application granted
    2004-01-28|Publication of KR100401531B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR1019960077818A|KR100401531B1|1996-12-30|1996-12-30|Apparatus for testing semiconductor device|
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